Image sensors traditionally are made up of an array of light sensitive pixels. The image sensor reads-out the value of each pixel to produce an image, and before the array of pixels is exposed to receive light, each pixel is reset.
As shown in prior art FIG. 1, a current column source ICOL is provided for each column to bias the pixels PIX of that column and, as such, reset their values. Each column current source ICOL is one half of a current mirror circuit. A diode connected transistor MBIAS makes up the other half of the current mirror and is common to each column current source ICOL. The current ICOLBIAS is mirrored at ICOL<1> to ICOL<col>.
The current column source ICOL is not required continuously during an imaging cycle, but only when the pixel values require to be reset for integration and readout. Consequently, to reduce power consumption, the circuit comprises two reference currents in parallel I1 and I2. A switch SW is provided for selectively connecting the reference current I2. When the current sources are required, the switch is closed and ICOLBIAS is equal to I1+I2. When the current sources are not required, the switch SW is opened and ICOLBIAS is equal to I1.
When switching between values of ICOLBIAS, there is an inherent lag associated with powering up and down of the array due to the associated parasitic capacitance of the array. It may take 5 μs or longer to switch between values of ICOLBIAS. As pixel arrays get larger, the parasitic capacitance increases and the time to switch between values of ICOLBIAS increases further.